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November 3, 2026
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Tech · AI

Meta Runs Google AI Chips in Production via New PyTorch Support

A new open source update allows Meta to deploy its PyTorch workloads on Google TPUs without rewriting code, marking a major shift in the AI hardware landscape.

By Javier Cabrera ·

Illustration for: Meta Runs Google AI Chips in Production via New PyTorch Support
Illustration generated for this article, not a news photograph.

Major AI infrastructure providers are changing how their computing power is accessed by large tech companies. Meta Platforms, the company behind the popular PyTorch framework, now runs AI models in production on Google's custom silicon. This development allows Meta to use Google's tensor processing units without needing to convert its existing software to a different framework. The change provides Meta with a new, native option for its hardware needs. This reduces the complexity of managing diverse computing environments for one of the world's largest AI developers.

The technical shift centers on two key inference engines: SGLang and vLLM. Previously, running these tools on Google TPUs required using Google's JAX framework. The new versions, announced on Google's developer blog, are PyTorch native. This means developers can use the hardware with minimal code changes. A tuned vLLM setup achieved over 700 tokens per second for a single user on the seventh-generation Ironwood TPU. This test used 16 chips with a method called speculative decoding. By comparison, 16 Nvidia GB200 chips reached 452 tokens per second in a similar published setup. The new kernels also show roughly 1.4 to 2 times the throughput of the Nvidia baseline at small batch sizes without that acceleration method.

Meta's Zongwei Zhou, who leads PyTorch work on TPUs, confirmed that the SGLang-TorchTPU engine is already active in Meta's production environment. He described the result as a remarkably mature serving stack. Zhou noted that the engine is the product of a close three-way collaboration between Meta, Google, and the SGLang team. His team operates at RadixArk, a startup founded by the creators of SGLang. Jana van Greunen, Meta's director of PyTorch engineering, emphasized that the company cannot be limited to a single hardware architecture. She stated that the new TorchTPU tool enables Meta to deploy its PyTorch workloads directly to Google TPUs. Google confirmed it co-developed this tool with Meta's PyTorch team.

This is not the first time Meta has explored Google's hardware, but it is a significant step forward. Google describes the older PyTorch/XLA bridge as a predecessor to the current TorchTPU. Reports from last year indicated that Meta research teams used TPUs through that older bridge between 2020 and 2023. Meta later canceled those specific contracts. The current push by Google was primarily aimed at Meta, which had previously resisted migrating to JAX. While the exact location of Meta's production TPUs is not public, talks last year reportedly involved renting Google Cloud TPUs in 2026 and purchasing them in 2027. Meta is also reported to have signed a multi-year rental agreement.

The announcement arrived one day after Amazon revealed it was open-sourcing TorchNeuron. This is Amazon's native PyTorch backend for its Trainium2 and Trainium3 chips. Both Google and Amazon are making moves that appear designed to loosen Nvidia's software dominance in the AI market. By making their hardware compatible with the industry-standard PyTorch framework, they are lowering the barrier for other companies to adopt their technology. This could influence how future AI models are built and deployed across the tech sector.

Looking ahead, SGLang-TorchTPU will continue to support more models. The initial additions include DeepSeek V4.1 Flash and Reflection Beam. RadixArk says it is working toward Day 0 support for new open models by the first quarter of 2027. This means the engine will support new models on their release day. Google, Meta, and RadixArk plan to share more details at the SGLang Summit 2026. The event is scheduled for November 12 and 13 in San Francisco. These developments signal a growing trend toward interoperability in the AI hardware space.

Source: Tom's Hardware · original report published

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